Can simple decisions become something useful?
“Can we combine isolated logic decisions into circuits that perform real computation?”
In Section 2, we discovered that physical switches can make decisions like AND, OR, and NOT. But isolated logic gates are not a computer. Real computation requires combining those decisions to add numbers, select data streams, decode instructions, compare values, and execute algorithms. In this section, we will assemble those building blocks into the computational heart of every chip: The Arithmetic Logic Unit (ALU).
Can a circuit add two bits?
To make a machine calculate, we must combine basic logic gates into arithmetic circuits. Let us begin with the simplest possible arithmetic question: what happens when we add two single binary bits?
What happens when we add 0 + 0, 0 + 1, and 1 + 1?
In base-2 binary arithmetic:
• 0 + 0 = 0 (Sum = 0, Carry = 0)
• 0 + 1 = 1 and 1 + 0 = 1 (Sum = 1, Carry = 0)
• 1 + 1 = 2₁₀ = 10₂ (Sum = 0, Carry = 1)
Why do we suddenly need two output wires?
When adding 1 + 1, the sum cannot fit into a single binary digit. The number 2 in binary is 10₂. We need one wire for the Sum bit (S) and a second wire for the Carry bit (C).
How do logic gates create addition?
Look closely at the truth table: The Sum bit is 1 only when inputs A and B are different. That is precisely an XOR gate (S = A ⊕ B). The Carry bit is 1 only when both A and B are 1. That is precisely an AND gate (C = A · B). Connecting one XOR and one AND in parallel creates the Half Adder!
3.1 & 3.2 Binary Addition: From Gates to Multi-Bit Adders
Discover how simple XOR and AND gates combine to perform binary arithmetic: single-bit Half Adders, carry-propagating Full Adders, and multi-bit Ripple Carry chains.
Architectural Limitation: A Half Adder only accepts two inputs (A, B). It cannot accept a Carry-In from a previous bit position. Therefore, you cannot chain half adders together to add multi-bit numbers!
| A | B | Sum (S) | Carry (C) | Binary Value |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 00₂ (0₁₀) |
| 0 | 1 | 1 | 0 | 01₂ (1₁₀) |
| 1 | 0 | 1 | 0 | 01₂ (1₁₀) |
| 1 | 1 | 0 | 1 | 10₂ (2₁₀) |
What happens when there is already a carry?
A Half Adder is limited because it can only accept two inputs (A, B). It has no input for a Carry-In from a previous stage, making it impossible to add multi-digit numbers.
How can a circuit add three bits (A, B, and Cin)?
We construct a Full Adder by cascading two Half Adders and an OR gate. The first Half Adder adds A and B, producing an intermediate sum. The second Half Adder adds that intermediate sum with the Carry-In (Cin). Finally, an OR gate collects the carry outputs to produce Cout.
Can we add multi-bit integers (4-bit, 8-bit, 32-bit)?
Yes! By chaining the Cout of each Full Adder into the Cin of the next stage, we create a Ripple Carry Adder. The carry signal ripples from the least significant bit (LSB) to the most significant bit (MSB), enabling processors to add multi-bit numbers of arbitrary size.
Can a circuit choose between inputs?
In any computer, many data streams exist simultaneously—clock pulses, sensor readings, arithmetic results, and memory bytes. How does a chip select only the one stream needed right now?
What is a Multiplexer (MUX)?
A Multiplexer (MUX) is a digital switch that selects one of several input signals and forwards it to a single output line using binary selector pins. For instance, a 4-to-1 MUX uses 2 selector bits (S₁, S₀) to choose precisely which of the 4 inputs (I₀..I₃) reaches output Y.
How does it work internally?
Internally, each input line connects to an AND gate. The selector lines act as valves: only the AND gate whose selector code matches is enabled with 1s, allowing its input signal to pass through to an OR gate collector.
3.3 Multiplexer (MUX): The Traffic Controller of Digital Circuits
A Multiplexer acts as a digital switch that selects one of several input signals and forwards it to a single shared output line using binary selector pins.
| S₁ (MSB) | S₀ (LSB) | Selected Channel | Output Equation (Y) | Current Value |
|---|---|---|---|---|
| 0 | 0 | I₀ (Signal 0) | Y = I₀ | 1 (HIGH) |
| 0 | 1 | I₁ (Signal 1) | Y = I₁ | 1 (HIGH) |
| 1 | 0 | I₂ (Signal 2) | Y = I₂ | 1 (HIGH) |
| 1 | 1 | I₃ (Signal 3) | Y = I₃ | 1 (HIGH) |
Can a circuit select one option from many?
When a program executes load from memory address 0x02, how does the physical hardware ensure that only memory bank #2 is activated while all other banks remain untouched?
What is a Binary Decoder?
A Decoder performs the exact opposite conceptual function of a multiplexer: it takes an n-bit binary code (such as an address or instruction opcode) and activates exactly one of 2ⁿ output lines.
Where are decoders used in real chips?
Decoders are ubiquitous in RAM row selection, cache memory addressing, and CPU instruction decoders (translating a 32-bit binary instruction word into specific hardware enable signals).
3.4 Binary Decoders & Encoders: Hardware Addressing
A Decoder performs the dual function of a multiplexer: it accepts an n-bit binary address and activates exactly one of 2ⁿ target sub-circuits or memory cells.
EN = 1, exactly ONE output wire is driven HIGH based on the binary combination on (A₁, A₀). All other outputs remain LOW (0).Start-up code & BIOS instructions
0xCAFE (Boot ROM)Stack, heap, and runtime variables
0x55AA (User RAM)Pixel frame color display data
0xFF00 (Video VRAM)Sensors, motor PWM, and network
0x0042 (GPIO I/O)Can a circuit compare numbers?
Every software program depends on decision branching: if (score > 100) or if (password == stored). How does raw silicon determine whether two multi-bit binary numbers are equal or which one is greater?
How do we detect equality in hardware?
Single-bit equality is evaluated using the XNOR gate (A ⊙ B), which outputs 1 when both bits are identical. For a 4-bit word, four XNOR gates check each bit position in parallel. If all four match, a 4-input AND gate drives the (A == B) line HIGH.
How do we detect Greater-Than (A > B)?
The comparator inspects bits starting from the Most Significant Bit (MSB). If A₃ = 1 and B₃ = 0, then A > B immediately, regardless of lower bits. If they match, comparison cascades to bit 2, then bit 1, then bit 0.
3.5 Magnitude Comparator: Hardware Decision Making
How does a processor evaluate `if (A == B)` or `if (A > B)` in silicon? By comparing multi-bit words through bitwise XNOR gates and cascading magnitude logic.
Can we combine these into something bigger?
We now have all the building blocks: Adders for arithmetic, Logic arrays for bitwise operations, Multiplexers for steering data, and Comparators for conditions. When we combine them into a single unified unit, we get the computational engine of every processor: The Arithmetic Logic Unit (ALU).
How does the ALU execute instructions in parallel?
In silicon, all internal components (Ripple Carry Adders, subtractors, AND, OR, XOR arrays) compute their results simultaneously in parallel! The incoming Opcode feeds control logic and a high-speed Multiplexer (MUX) to select and route only the user-requested result to the output bus.
What are Hardware Status Flags (Z, C, N, V)?
Every operation produces status flags:
• Zero Flag (Z): Set to 1 if the result is 0000₂.
• Carry Flag (C): Set to 1 if addition generated an unsigned carry-out.
• Negative Flag (N): Set to 1 if the MSB (sign bit) is 1.
• Overflow Flag (V): Set to 1 if signed 2's complement overflow occurred.
These flags are the physical bridge between raw hardware arithmetic and high-level software if/else statements!
3.6 The Arithmetic Logic Unit (ALU): The Computational Heart
The ALU arranges arithmetic circuits alongside bitwise logic arrays to calculate all outcomes in parallel. An Opcode-driven MUX routes only the requested result to the output, while hardware status flags drive software branching.
000₂ (ADD)if (A == B) (Branch if Z==1)if (A < B) (Branch if N!=V)if (A + B > 15) (Branch if C==1)3.6 Simulation to Silicon: From Logisim to 7400-Series Breadboards
Before committing designs to physical silicon or wiring breadboards, engineers use schematic capture & logic simulators (Logisim, Digisim, Falstad) to verify truth tables and timing.
Change inputs instantly without worrying about short circuits, overheating components, or burnt silicon.
Verify gate propagation delays and race conditions across multi-bit ripple carry stages before manufacturing.
The Journey: From Simple Decisions to a Complete ALU
Single-bit decisions made by semiconductor transistor switches.
Combining XOR and AND gates to ripple carry across multi-bit words.
Selecting data channels and decoding memory addresses dynamically.
Parallel execution core + Opcode MUX + Status Flags (Z, C, N, V).
Our circuits can calculate...
but can they remember?
Look closely at everything we have built in Section 3: every time an input wire flips, the output instantly recalculates. As soon as you remove power or change the input, the previous result is lost forever.
A combinational circuit has zero memory of the past. It cannot remember what happened a microsecond ago. It cannot store a variable, track a loop counter, or hold program state.